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Keynote

Keynote
Keynote 1
Oct. 13th | 10:30-11:20
Exynos On-device AI

Dr. Hyukjune Chung
Corporate EVP / Head of AP Development
System LSI
Samsung Electronics Co., Ltd., Korea

Biography

2020 – Current: Samsung Electronics
Current position – Head of AP Development
Experiences in leading SOC development, SOC architecture design

2005 – 2020: Qualcomm
Experiences in low power architecture & system design, video/computer vision HW/SW & architecture design, Mobile / Visual standard engineering & delegation including MPEG, JVT, 3GPP, 3GPP2.

Ph.D. University of Southern California, Department of Electrical Engineering, 2004
M.S. Seoul National University, School of Electrical Engineering, 1999
B.S. Seoul National University, School of Electrical Engineering, 1997

Abstract

In this talk, I will focus on on-device AI computing, and for this, I will present evolution of Exynos AI HW/SW solutions, challenges to support generative AI processing, and systematic approaches to overcome these challenges.

Keynote 2
Oct. 13th | 11:30-12:20
TBD

Frank Schirrmeister
Product Management, Executive Director
PMG, Product Management & Markets Group
Synopsys, USA

Biography

Frank Schirrmeister is Executive Director, Strategic Programs, System Solutions in Synopsys’ System Design Group.

He leads strategic activities across system software and hardware assisted development for industries like automotive, data center and 5G/6G communications, as well as for horizontals like Artificial Intelligence / Machine Learning.

Prior to Synopsys, Frank held various senior leadership positions at Arteris, Cadence Design Systems, Imperas, Chipvision, and SICAN Microelectronics, focusing on product marketing and management, solutions, strategic ecosystem partner initiatives, and customer engagement.

He holds an MSEE from the Technical University of Berlin and actively participates in cross-industry initiatives as Chair of the Design Automation Conference’s Engineering Tracks.

Abstract

TBD

Keynote 3
Oct. 14th | 10:40-11:30
The Next-Generation AI Accelerator: Redefining Inference for a Sustainable AI Future

Dr. Youngjin Cho
Vice President, Head of Hardware
Hardware Development
FuriosaAI, Korea

Biography

Youngjin Cho is Vice President of Hardware at FuriosaAI, where he leads the development of
SoCs and AI accelerators. Previously, he spent 16 years at Samsung Electronics, serving as
Corporate Vice President and leading SSD controller programs and ASIC/SoC architecture. He
was a Visiting Scholar at Stanford University in 2017 and holds a Ph.D. in Computer Science
from Seoul National University in 2009. His deep expertise in system architecture and silicon design
now drives FuriosaAI’s next-generation AI inference chip development.

Abstract

As AI inference becomes ubiquitous infrastructure, the industry faces critical challenges in achieving sustainable and cost-effective computing. Current GPU-based solutions, not purpose-built for inference, suffer from poor energy efficiency that threatens AI scalability. This keynote presents TCP (Tensor Contraction Processor), a domain-specific architecture that elevates tensor contraction as the primitive operation. By introducing low-level einsum notation with explicit memory layout and scheduling, TCP enables unprecedented flexibility through software-defined topology and automated compilation, while achieving optimal performance. Our silicon implementation RNGD delivers 512 TFLOPS (FP8) at 150W TDP for air-cooled data centers, demonstrating 4.1× better first token latency and 2.7× improved throughput/watt on LLaMA-7B versus GPUs. This presentation will share our journey from concept to commercial deployment, examining how domain-specific design choices enable sustainable AI infrastructure